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52 Overview
LAN link. This link is composed of two asynchronous serial buses (called
the Async card LAN link in Figure 11 "Typical IPE trunk card architecture"
(page 49)). The output bus is used by the controller for output of control
data to the trunk card.The input bus is used by the controller for input of
trunk card status data.
Figure 13
Network connections to IPE modules
A card LAN link bus is common to all of the line/trunk card slots within an
IPE module (or IPE section of a CE module). This bus is arranged in a
master/slave configuration where the controller card is the master and all
Nortel Communication Server 1000
Circuit Card Reference
NN43001-311 01.04 Standard
Release 5.0 23 May 2008
Copyright © 2003-2008, Nortel Networks
.
- Circuit Card Reference 1
- Option settings 81 4
- NT5K21 XMFC/MFE card 365 6
- NT6D70 SILC Line card 373 6
- NT6D71 UILC line card 383 6
- NT6D80 MSDL card 389 6
- NT7D16 Data Access card 419 6
- NT8D03 Analog Line card 533 7
- NT8D15 E and M Trunk card 715 7
- Card 1035 10
- The TDS/DTR card 1117 12
- New in this release 13
- How to get help 15
- 16 How to get help 16
- Overview 17
- Line cards 18
- NT8D02 Digital Line card 19
- Installation 19
- 20 Overview 20
- Figure 1 20
- Host interface bus 21
- 22 Overview 22
- Line cards 23 23
- Figure 2 23
- 24 Overview 24
- Line cards 25 25
- Figure 3 25
- DS-30X loop data format 25
- Analog line interface units 26
- Coder/Decoder circuit 27
- Variable gain filters 27
- Balancing network 28
- Digital line interface units 28
- TCM loop interfaces 29
- Signaling 30
- Analog line call operation 30
- Line cards 31 31
- Figure 6 31
- 32 Overview 32
- Figure 7 32
- Message waiting 33
- Analog line supervision 33
- Digital line call operation 34
- Line cards 35 35
- Figure 8 35
- Idle (on-hook) 36
- Loop Start Mode 37
- Ground Start Mode 39
- 40 Overview 40
- Ground Start Restrictions 41
- Voice frequency audio level 42
- Off-premise line protection 43
- Line protectors 43
- Trunk cards 44
- NT8D14 Universal Trunk card 45
- NT8D15 E and M Trunk card 45
- Operation 49 49
- Figure 11 49
- 50 Overview 50
- Operation 51 51
- Figure 12 51
- 52 Overview 52
- Figure 13 52
- Trunk interface unit 53
- 54 Overview 54
- Figure 14 54
- Power consumption 57
- Electrostatic discharge 58
- Electromagnetic interference 58
- 60 Overview 60
- Circuit card installation 61
- Circuit and installation 62
- Precautions 64
- Installing a circuit card 66
- 68 Circuit card installation 68
- Figure 16 68
- Installing a circuit card 69 69
- 70 Circuit card installation 70
- Acceptance tests 71
- 72 Acceptance tests 72
- STAT loop 72
- Conference cards 73 73
- Digitone receiver cards 74
- Multifrequency sender cards 75
- 76 Acceptance tests 76
- Procedure 7 76
- Network cards 77
- 78 Acceptance tests 78
- Procedure 9 78
- Procedure 10 78
- Tone and digit switch cards 79
- Option settings 81
- Circuit card grid 82
- General purpose switches 85
- Trunk interface switches 85
- Ring ground switches 86
- 88 Option settings 88
- Figure 18 88
- Switch functions and areas 88
- NT6D42 Ringing Generator DC 89
- NT6D68 Core module backplane 92
- NT8D17 Conference/TDS card 96
- NT8D21 Ringing Generator AC 96
- NT8D22 System Monitor 97
- NN43001-311 01.04 Standard 100
- Release 5.0 23 May 2008 100
- NT8D22 jumper settings 101
- Baud rate 101
- DTE/DCE mode 102
- QPC414 Network card 105
- QPC441 3-Port Extender cards 106
- QPC528 CO/FX/WATS Trunk cards 109
- QPC471 Clock Controller card 110
- QPC775 Clock Controller card 115
- Line card 119
- Self Test 122
- Physical description 123 123
- Figure 21 123
- Card interfaces 125
- Maintenance communication 126
- Maintenance communications 126
- Power interface 127
- Line interface units 127
- Card LAN interface 128
- Signaling and control 128
- Card control functions 129
- Microcontroller 130
- Circuit power 136
- Analog line interface 136
- Ringer limitations 137
- Incoming calls 139
- Outgoing calls 140
- Connector pin assignments 143 143
- Figure 23 143
- Jumper strap settings 144
- Figure 24 146
- Application 147
- Application 149 149
- Figure 25 149
- Other applications 150
- Transmission considerations 151
- Port-to-port loss 152
- Application 153 153
- Application 157 157
- = 10.5 dB 157
- Application 159 159
- NT4N39AA CP Pentium IV Card 161
- Physical description 163 163
- Figure 26 163
- CP PIV card (front) 163
- COM1 and COM2 ports 165
- USB port 165
- Front panel LED indicators 166
- Post 80 Debug LEDs (Optional) 167
- NT5D11 and NT5D14 Lineside T1 169
- Interface cards 169
- Card connections 171
- Physical description 175 175
- Figure 29 175
- Lineside T1 card - faceplate 175
- Functional description 177 177
- Figure 30 177
- Figure 31 178
- Functional description 179 179
- T1 interface circuit 180
- Microcontrollers 182
- Sanity timer 184
- T1 channel specifications 186
- Environmental specifications 187
- Installation and configuration 188
- Dip switch settings 189
- MMI port speed selection 190
- T1 framing 191
- T1 coding 191
- DSX-1 length 192
- Daisy-chaining to MMI 192
- MMI master or slave 192
- Figure 33 195
- T1 Coding 196
- Daisy-Chaining to MMI 196
- MMI Master or Slave 197
- Cabling the Lineside T1 card 202
- Procedure 12 204
- Connecting to the MDF 204
- Figure 34 205
- Figure 35 206
- T1 connections 208
- External alarm connections 209
- MMI connections 209
- Procedure 13 210
- Figure 36 211
- I/O cable 213
- Figure 37 216
- Terminal configuration 218
- Software configuration 219
- Disconnect supervision 221
- OSP <CR> 222
- ISP <CR> 222
- Clocking Requirement 223
- Figure 39 224
- Figure 40 224
- MG1000 chassis 224
- Description 225
- Login and password 229
- L 13 4 <CR> 230
- L<CR> 230
- L <address> 230
- Basic commands 231
- Configuring parameters 235
- Set Time 235
- Set Date 235
- Alarm parameters 236
- Set Clearing 239
- Display Configuration 239
- Alarm operation and reporting 243
- Alarm Disable 244
- Alarm Enable 244
- Clear Alarm 244
- Display Alarms 245
- Clear Alarm Log 245
- Display Status 245
- Display Performance 248
- Display History 249
- Clear Error 249
- Applications 257 257
- Figure 49 257
- Figure 50 258
- Applications 259 259
- Figure 51 259
- Figure 52 260
- Applications 261 261
- Figure 53 261
- Figure 54 262
- NT5D33 and NT5D34 Lineside E1 263
- Figure 56 266
- NT5D34AB LEI card - faceplate 266
- E1 interface circuit 269
- Sanity Timer 271
- Man-Machine Interface 271
- ELEI additional functionality 271
- Installation and Configuration 274
- Address of LEI to the MMI 275
- E1 framing 275
- E1 Coding 275
- Figure 59 276
- Cabling the LEI card 282
- E1 Connections 284
- External Alarm Connections 285
- MMI Connections 285
- Procedure 14 286
- Software Configuration 287
- Clocking Requirement 291 291
- Figure 61 291
- Figure 62 291
- Login and Password 294
- Set Alarm 298
- Set Simple 301
- Set Mode 302
- Figure 69 303
- Set Mode (S M): Table screen 303
- Figure 70 304
- Display Configuration (D C) 306
- Figure 73 309
- Display Status (D S) screen 309
- Figure 78 313
- MMI Local loopback test 313
- Figure 79 313
- MMI External loopback test 313
- Applications 315 315
- Figure 81 315
- LEI connection to IPE 315
- Figure 82 315
- Figure 83 316
- NT5D60/80/81 CLASS Modem card 317
- NT5D97 faceplate 327
- Enable/Disable Switch 328
- ENET LEDs 328
- Physical description 329 329
- Unit 1 Clk Connectors 330
- Connector J5 (TRK) 330
- Connector J6 (DCH) 330
- Port definitions 330
- Physical capacity 331
- D-Channel capacity 331
- CPU capacity 331
- Cable requirements 332
- E1 carrier cables 333
- Reference clock cables 337
- MSDL/DCH cables 337
- External DCH cable 337
- External MSDL cable 337
- Cable diagrams 338
- Physical description 339 339
- Figure 92 339
- Impedance level and unit mode 342
- Transmission mode 343
- Line build out 343
- Receiver impedance 343
- NT5D97AA/AB 344
- NT5D97AD DIP switch settings 345
- NT5D97AD" (page 347) 346
- Functional description 347 347
- Figure 95 347
- Tracking mode 351
- Free run (non-tracking) mode 351
- Reference clock errors 352
- Automatic clock recovery 352
- Automatic clock switching 352
- Clock configurations 353
- Figure 98 356
- Clock Controller - Option 2 356
- Operation 357 357
- Figure 99 357
- Clock Controller - Option 3 357
- Figure 100 358
- Clock Controller - Option 4 358
- Procedure 16 360
- Removing the NT5D97 360
- Configuring the NT5D97 361
- Testability and diagnostics 361
- D-Channel daughterboard 362
- NT5K21 XMFC/MFE card 365
- Forward and backward signals 366
- MFE signaling 367
- Sender and receiver mode 368
- ST/PAA/CLC/CER/692 369
- Physical specifications 370
- Physical specifications 371 371
- (Slots 1-10) 371
- 372 NT5K21 XMFC/MFE card 372
- NT6D70 SILC Line card 373
- ISDN BRI 374
- 376 NT6D70 SILC Line card 376
- Functional description 377 377
- Micro Controller Unit (MCU) 378
- IPE interface logic 378
- Functional description 379 379
- S/T interface logic 380
- Functional description 381 381
- 382 NT6D70 SILC Line card 382
- NT6D71 UILC line card 383
- Functional description 387 387
- U interface logic 388
- NT6D80 MSDL card 389
- 392 NT6D80 MSDL card 392
- Figure 102 392
- MSDL block diagram 392
- Micro Processing Unit (MPU) 393
- Serial interface 393
- MSDL operations 394
- Data flow 395
- Engineering guidelines 396
- Port specifications 397
- Implementation guidelines 400
- Installing the MSDL card 403
- Cable installation 406
- PRI trunk connections 406
- I/O panel connections 406
- MSDL planning form 407
- Maintenance 408
- Manually enabled 409
- System disabled 409
- Maintaining the MSDL 410
- System controlled maintenance 411
- Enabling the MSDL 412
- Disabling the MSDL 412
- Resetting the MSDL 412
- Displaying MSDL status 412
- Self-testing the MSDL 412
- Newly installed MSDL cards 413
- Replacing MSDL cards 414
- Symptoms and actions 415
- System disabled actions 415
- SYSTEM DISABLED—SELF-TESTING 416
- SYSTEM DISABLED—OVERLOAD 417
- SYSTEM DISABLED—FATAL ERROR 418
- NT7D16 Data Access card 419
- Features 420
- Controls and indicators 421
- Dialing operations 422
- Call Set-up abort 423
- Make Port Busy on loss of DTR 424
- Inactivity timeout 424
- Wire test mode 425
- Operating modes 426
- 430 NT7D16 Data Access card 430
- Figure 108 430
- DAC to modem connectivity 430
- Configuring modems for mode 0 431
- 432 NT7D16 Data Access card 432
- Figure 109 432
- Configuring modems for mode 1 433
- 434 NT7D16 Data Access card 434
- Operating modes 435 435
- 436 NT7D16 Data Access card 436
- Figure 110 436
- DAC to Gateway connectivity 436
- Operating modes 437 437
- Figure 111 437
- 438 NT7D16 Data Access card 438
- Operating modes 439 439
- Figure 112 439
- DAC to Host connectivity 439
- 440 NT7D16 Data Access card 440
- Operating modes 441 441
- 442 NT7D16 Data Access card 442
- Figure 113 442
- DAC to Terminal connectivity 442
- Operating modes 443 443
- Mode selection baud rates 444
- Keyboard dialing 453
- Initiating conditions 454
- Call abort 455
- Autobaud 455
- Baud Rate xxxx expected 455
- Auto parity 455
- Dialing operation 455
- Primary commands 456
- Call (C) 456
- Autodial (A) 457
- Speed Call (S) 457
- 458 NT7D16 Data Access card 458
- Keyboard dialing 459 459
- Ring Again 460
- Keyboard dialing 461 461
- Hayes dialing 462
- Input requirements 463
- Result codes and messages 464
- Baud rate detection 465
- Parity detection 465
- S registers 467
- Reset Hayes parameters 469
- Outbound calls 470
- Inbound calls 470
- Off Line mode 471
- Specifications 472
- Operating parameters 473
- Upload parameters 474
- System database requirements 475
- 476 NT7D16 Data Access card 476
- Figure 114 476
- Figure 115 477
- Power supply 478
- Environmental 479
- Reliability 479
- Cabinet system 479
- Large System 480
- System compatibility 480
- Port configuration 481
- 482 NT7D16 Data Access card 482
- Figure 116 482
- 484 NT7D16 Data Access card 484
- Figure 117 484
- Cabling to the data equipment 484
- Cabling 485 485
- Figure 118 485
- RJ-11 or RJ-45 jacks 485
- 486 NT7D16 Data Access card 486
- Figure 119 486
- Patch panel layout 486
- Figure 120 487
- Octopus cabling 487
- DAC administration (LD 11) 490
- Upgrading systems 494
- Segment 0 495
- Segment 1 496
- Segment 2 496
- Segment 3 496
- 498 NT7D16 Data Access card 498
- NTDK16 Digital Line card 500
- Physical description 503 503
- Figure 123 503
- Digital line card - faceplate 503
- Figure 124 504
- Physical description 505 505
- Figure 125 505
- Functional description 509 509
- Figure 127 509
- NTDK16 DLC 509
- Figure 128 510
- Functional description 511 511
- Figure 129 511
- Digital line interfaces 513
- TCM loop interface circuit 515
- Technical summary 520
- Jumper and switch settings 528
- Configuration 529 529
- Figure 131 529
- Figure 132 530
- Configuration 531 531
- Figure 133 532
- NT8D03 Analog Line card 533
- 534 NT8D03 Analog Line card 534
- Physical description 539 539
- Figure 134 539
- Functional description 543 543
- Figure 135 543
- Figure 136 544
- Functional description 545 545
- Technical summary or 548
- Frequency response 550
- Message channel noise 550
- Overload level 555
- Configuration 559 559
- Figure 137 559
- Configuration 565 565
- Figure 140 565
- Physical description 573 573
- Figure 141 573
- Figure 142 574
- Physical description 575 575
- Functional description 577 577
- Figure 144 577
- Functional description 579 579
- Figure 145 579
- Trunk interface units 580
- Functional description 581 581
- Functional description 583 583
- Loop start operation 586
- Operation 587 587
- Figure 147 587
- Figure 148 588
- Operation 589 589
- Figure 149 589
- DTMF tones 591
- Figure 152 592
- Operation 593 593
- Figure 153 594
- Operation 595 595
- Figure 154 595
- Figure 155 596
- Ground start operation 597
- Operation 599 599
- Figure 157 599
- Figure 158 600
- Operation 601 601
- Figure 159 601
- Figure 160 602
- Operation 603 603
- Figure 161 604
- Operation 605 605
- Figure 162 606
- Figure 163 608
- Operation 609 609
- Figure 164 609
- Figure 165 610
- Operation 611 611
- Figure 166 611
- Figure 167 612
- Operation 613 613
- Figure 168 613
- Figure 169 614
- Direct inward dial operation 615
- Operation 617 617
- Figure 171 617
- Figure 172 618
- Operation 619 619
- Figure 173 619
- Figure 174 620
- Figure 175 622
- Operation 623 623
- Figure 176 623
- Figure 177 624
- Operation 625 625
- Figure 178 625
- Operation 627 627
- Figure 179 627
- Figure 180 628
- Operation 629 629
- Figure 181 629
- Figure 182 630
- Operation 631 631
- Figure 183 631
- Figure 184 632
- Operation 633 633
- Figure 185 633
- Figure 186 634
- Operation 635 635
- Figure 187 635
- Figure 188 636
- Operation 637 637
- Figure 189 637
- Operation 639 639
- Figure 191 640
- CO/FX/WATS trunk 640
- Operation 641 641
- Figure 192 641
- Figure 193 644
- Operation 645 645
- Figure 194 645
- Figure 195 646
- Operation 647 647
- Figure 196 647
- Figure 198 650
- Operation 651 651
- Figure 199 651
- Figure 200 652
- Operation 653 653
- Figure 201 653
- Figure 202 654
- Operation 655 655
- Figure 203 655
- Figure 204 656
- Operation 657 657
- Figure 205 657
- Figure 206 658
- Operation 659 659
- Figure 207 659
- Figure 208 660
- Operation 661 661
- Figure 209 661
- Operation 663 663
- Figure 210 664
- Operation 665 665
- RAN modes of operation 666
- Operation 667 667
- Figure 212 668
- Operation 669 669
- Figure 213 669
- Figure 214 670
- Multi-Channel RAN modes 671
- RTYP = MLSS 672
- Operation 673 673
- Call routing to RAN trunks 675
- Programming RAN trunks 675
- Tr unk card 678
- Tr unk Card 679
- Release control 684
- PAD switching 684
- Electrical specifications 685 685
- Table 245 685
- Configuration 695 695
- Figure 216 695
- Service change entries 696
- Configuration 701 701
- Figure 217 701
- Figure 218 702
- Figure 219 706
- Applications 711 711
- Figure 220 711
- Music operation 712
- Applications 713 713
- Figure 221 713
- Figure 222 714
- 720 NT8D15 E and M Trunk card 720
- Physical description 721 721
- Figure 223 721
- 722 NT8D15 E and M Trunk card 722
- Common features 724
- Functional description 725 725
- Figure 225 725
- 726 NT8D15 E and M Trunk card 726
- Figure 226 726
- Functional description 727 727
- Figure 227 727
- Functional description 729 729
- Trunk circuit features 730
- Trunk unit functions 731
- 732 NT8D15 E and M Trunk card 732
- Figure 228 732
- E and M Type I signaling 732
- Figure 229 732
- E and M Type II signaling 732
- Functional description 733 733
- 734 NT8D15 E and M Trunk card 734
- Figure 230 734
- 4-wire DX signaling 734
- Functional description 735 735
- Figure 231 735
- Paging trunk operation 735
- 736 NT8D15 E and M Trunk card 736
- Figure 232 736
- Functional description 737 737
- Figure 233 737
- 738 NT8D15 E and M Trunk card 738
- Figure 234 738
- Functional description 739 739
- Figure 235 739
- Figure 236 739
- 740 NT8D15 E and M Trunk card 740
- Figure 237 740
- Card LAN 742
- Signaling interface 743
- Functional description 745 745
- Maintenance features 746
- Operation 749 749
- 750 NT8D15 E and M Trunk card 750
- Figure 240 750
- Operation 751 751
- Figure 241 751
- 752 NT8D15 E and M Trunk card 752
- Figure 242 752
- Operation 753 753
- Figure 243 753
- 754 NT8D15 E and M Trunk card 754
- Figure 244 754
- 758 NT8D15 E and M Trunk card 758
- Figure 245 758
- Duplex signaling 759
- Operation 765 765
- Figure 247 765
- 766 NT8D15 E and M Trunk card 766
- Figure 248 766
- Operation 767 767
- Figure 249 767
- 768 NT8D15 E and M Trunk card 768
- Figure 250 768
- Operation 769 769
- Figure 251 769
- Connector pin assignments 779 779
- Figure 252 779
- Connector pin assignments 781 781
- 782 NT8D15 E and M Trunk card 782
- Figure 253 782
- Jumper settings 785
- 786 NT8D15 E and M Trunk card 786
- Figure 255 786
- Software service entries 789
- 790 NT8D15 E and M Trunk card 790
- 796 NT8D15 E and M Trunk card 796
- Table 309 796
- 798 NT8D15 E and M Trunk card 798
- Figure 259 798
- Applications 799 799
- Figure 260 799
- 800 NT8D15 E and M Trunk card 800
- Figure 261 800
- System considerations 804
- Option switch settings 806
- DTE/DCE/Fiber mode 807
- Figure 265 810
- SDI paddle board cabling 810
- Figure 268 817
- Applications 819 819
- Figure 269 819
- Paddle Board 821
- Functional description 823 823
- Figure 270 823
- NT8D41BA QSDI paddle board 823
- Applications 829 829
- Physical description 831 831
- Applications 839 839
- Figure 275 839
- NTAG26 XMFR card 841
- XMFR receiver specifications 842
- MF signaling 844
- 848 NTAG26 XMFR card 848
- NTAK02 SDI/DCH card 849
- Connecting to the por ts 850
- NTAK09 1.5 Mb DTI/PRI card 859
- NTAK20 power on self-test 865
- NTAK93 self-test 865
- DTI/PRI local self-test 866
- Restrictions and limitations 866
- Clock controller interface 877
- NTAK10 2.0 Mb DTI card 879
- 884 NTAK10 2.0 Mb DTI card 884
- DS-30X interface 886
- Transmit data 887
- Receive data 888
- DS-30X microprocessor 888
- Interconnections 889
- CEPT interface 890
- Channel associated signaling 891
- Incoming signal 891
- Outgoing supervisory signals 891
- Periodic Pulse Metering (PPM) 892
- TS16 microprocessor 892
- Architecture 893 893
- Carrier interface 894
- Tx Direction 894
- Rx Direction 894
- Clocking modes 895
- 896 NTAK10 2.0 Mb DTI card 896
- Architecture 897 897
- Reference switchover 898
- Autorecovery and chatter 899
- 900 NTAK10 2.0 Mb DTI card 900
- Reference clock interface 901
- Switch settings 901
- NTAK20 Clock Controller 903
- Free-run (non-tracking) 908
- Functional description 911 911
- Digital phase lock loops 912
- EIA/CCITT compliance 914
- Monitoring references 914
- Digital to analog converter 917
- Holdover and free-run 917
- CPU-MUX bus interface 918
- Signal conditioning 918
- Reference Clock Selection 919
- External timing interface 920
- NTAK79 2.0 Mb PRI card 923
- NTAK79 switches 928
- allocations" 935
- Impedance matching 938
- Carrier grounding 939
- Receiver functions 940
- Transmitter functions 941
- Loopbacks 941
- CEPT transceiver 942
- Slip control 942
- D-channel support interface 942
- Card-LAN interface 945
- Architecture 947 947
- 948 NTAK79 2.0 Mb PRI card 948
- 950 NTAK79 2.0 Mb PRI card 950
- 952 NTAK79 2.0 Mb PRI card 952
- DMA controller 957
- Random Access Memory (RAM) 957
- Read Only Memory (ROM) 957
- Counter/timer controller 958
- Software interface circuit 958
- DPNSS/DCHI Por t 959
- D-Port - SDTI/PRI interface 960
- NTBK22 MISP card 961
- Functional description 963 963
- CPU to MISP bus interface 964
- MISP network bus interface 965
- 966 NTBK22 MISP card 966
- NTBK50 2.0 Mb PRI card 967
- LEDs" (page 970) 970
- Environment 972
- 974 NTBK50 2.0 Mb PRI card 974
- Architecture 985 985
- Architecture 987 987
- 988 NTBK50 2.0 Mb PRI card 988
- NTBK51 Downloadable D-channel 989
- Handler daughterboard 989
- Microprocessors 993
- Main memory 994
- Shared memory 994
- EPROM memory 994
- Flash EPROM memory 995
- EEPROM memory 995
- Download operation 996
- System initialization 997
- Card reset 998
- Background audit 999
- Contents 1001
- Introduction 1001
- Physical description 1002
- Functional description 1003
- Operation 1003
- Electrical specifications 1005
- Connector pin assignments 1006
- Configuration 1006
- Configuration 1007 1007
- Figure 282 1007
- Figure 283 1008
- Route Data Block 1009
- Trunk Data Block 1010
- Applications 1013
- Detection limits 1014
- Busy tone detect 1014
- Loss switching 1014
- Equivalencies 1015
- Trunk to Trunk connection 1015
- Call disconnect 1016
- Memory 1019 1019
- Figure 285 1019
- 100BaseT IP daughterboards 1020
- Figure 286 1021
- PC card interface 1023
- Security device 1023
- SDI ports 1024
- Conferencing 1025
- Figure 290 1027
- Media Gateway Expansion slots 1027
- Introduction 1031 1031
- Figure 291 1031
- MGC block diagram 1031
- Processor 1032
- Ethernet ports 1032
- Expansion daughterboards 1032
- Backplane interface 1032
- Serial data interface ports 1033
- Faceplate LED display 1033
- NTDW61 and NTDW66 Common 1035
- Processor Pentium Mobile Card 1035
- Introduction 1037 1037
- Figure 292 1037
- Cabinet/chassis suppor t 1038
- Media storage 1039
- Ethernet interfaces 1039
- USB 2.0 port 1040
- Faceplate 1041
- Figure 294 1042
- Faceplate buttons 1043
- DIP switch 1043
- LED indicators 1043
- Ethernet LEDs 1044
- ELAN and TLAN LEDs 1044
- HSP LEDs 1044
- Controller Daughterboards 1045
- Figure 297 1046
- Daughterboard configurations 1047
- Backplane interfaces 1050
- NTRB21 DTI/PRI/DCH TMDI card 1053
- ATTENTION 1054
- Figure 301 1058
- NTRB21 TMDI card faceplate 1058
- Power requirements 1062
- Software description 1065
- Hardware description 1065
- Figure 304 1066
- Architecture 1067
- Interconnection 1068
- Microprocessor 1069
- allocations 1070
- PAD set 0 PAD set 1 1070
- Architecture 1073 1073
- DS-1 Carrier interface 1074
- Transmitter 1074
- Receiver 1075
- Connector pinout 1075
- D-type connector 1076
- Clock rate converter 1078
- NTVQ01xx Media Card 1079
- Hardware architecture 1080
- PC card slot 1081
- Ethernet activity LEDs 1081
- Maintenance hex display 1081
- 1082 NTVQ01xx Media Card 1082
- Figure 307 1082
- NTVQ01xx Media Card faceplate 1082
- Survivability 1083
- 1084 NTVQ01xx Media Card 1084
- NTVQ55AA ITG Pentium card 1085
- ITG-P LED (Card Status) 1086
- Reset switch 1086
- NWK Status LED 1087
- Synchronous communication 1092
- Clock timing option 1093
- Test and maintenance features 1093
- Self-test 1093
- Fault detection 1094
- Fault isolation 1094
- Connection characteristics 1094
- Electrical interface options 1094
- Configuring the ESDI card 1097
- DTE/DCE mode jumper settings 1098
- Software service changes 1100
- Figure 313 1102
- QPC513 ESDI card cabling 1102
- Figure 315 1106
- Configuring the QSDI card 1109
- Baud rate switch settings 1110
- DTE/DCE mode switch settings 1110
- Test switch setting 1111
- Applications 1115 1115
- Figure 317 1115
- QPC841 QSDI card cabling 1115
- The TDS/DTR card 1117
- Tone detector 1118
- SDI function 1118
- Tones and cadences 1118
- 1128 The TDS/DTR card 1128
- Appendix A 1129
- Frame structure 1130
- Commands and responses 1131
- Description of procedure 1132
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